libyggdrasil  v1.0.0
bsp::core Namespace Reference

Functions

ALWAYS_INLINE void delay (u32 ms)
 Delays execution by a certain number of milliseconds. More...
 
ALWAYS_INLINE void disableInterrupts ()
 Disables all interrupts. More...
 
ALWAYS_INLINE void enableInterrupts ()
 Enables all interrupts. More...
 
ALWAYS_INLINE void setInterruptVectorBase (addr_t address)
 Sets the base address of the interrupt vector table. More...
 
ALWAYS_INLINE void invalidateICache ()
 Invalidates the entire ICache. More...
 
ALWAYS_INLINE void invalidateICache (void *address, size_t size)
 Invalidates all possibly cached instructions in a specific region of memory. More...
 

Variables

constexpr auto DCacheLineSize = 32
 Size of one Data Cache Line. More...
 
constexpr auto ICacheLineSize = 32
 Size of one Instruction Cache Line. More...
 

Function Documentation

◆ delay()

ALWAYS_INLINE void bsp::core::delay ( u32  ms)

Delays execution by a certain number of milliseconds.

Parameters
msNumber of milliseconds to wait

◆ disableInterrupts()

ALWAYS_INLINE void bsp::core::disableInterrupts ( )

Disables all interrupts.

◆ enableInterrupts()

ALWAYS_INLINE void bsp::core::enableInterrupts ( )

Enables all interrupts.

◆ invalidateICache() [1/2]

ALWAYS_INLINE void bsp::core::invalidateICache ( )

Invalidates the entire ICache.

◆ invalidateICache() [2/2]

ALWAYS_INLINE void bsp::core::invalidateICache ( void *  address,
size_t  size 
)

Invalidates all possibly cached instructions in a specific region of memory.

Parameters
addressStart address of the region
sizeSize of the region

◆ setInterruptVectorBase()

ALWAYS_INLINE void bsp::core::setInterruptVectorBase ( addr_t  address)

Sets the base address of the interrupt vector table.

Parameters
addressBase address

Variable Documentation

◆ DCacheLineSize

constexpr auto bsp::core::DCacheLineSize = 32
constexpr

Size of one Data Cache Line.

◆ ICacheLineSize

constexpr auto bsp::core::ICacheLineSize = 32
constexpr

Size of one Instruction Cache Line.